CUG 2006 home page

Preliminary Program

Schedule and Abstracts

Welcome from
the Program
Committee

Program Notes

Monday Tuesday Wednesday Thursday
Program Abstracts, sorted by Day, Session Number, and Time and the Final Program in PDF format.

Thursday

17 Technical Sessions
17A FPGAs & Supercomputers
(Room B1)
Chair: Peter Cebull (INL)
17B Parallel Programming
(Room B2)
Chair: John Noe (SNLA)
17C Mass Storage
(Room B3)

Chair: Brad Blasing (NCS-MINN)
8:20
Turning FPGAs Into Supercomputers—Debunking the Myths About FPGA-based Software Acceleration, Anders Dellson, Mitrionics AB Hybrid Programming Fun: Making Bzip2 Parallel with MPICH2 and pthreads on the XD1, Charles Wright (ASA) Lustre File System Plans & Performance on Cray Systems, Charlie Carroll and Branislav Radovanovic, Cray Inc.
9:00
Experiences with High-Level Programming of FPGAs on Cray XD1, Thomas Steinke, Konrad Zuse-Zentrum für Informationstechnik Berlin; Thorsten Schuett and Alexander Reinefeld, Zuse-Institut Berlin Parallel Performance Analysis on Cray Systems, Craig Lucas and Kevin Roy (MCC)
9:25
Experiences Harnessing Cray XD1 FPGAs and Comparisons to other FPGA High Performance Computing (HPC) Systems, Olaf Storaasli, Melissa C. Smith, and Sadaf R. Alam (ORNL) An Evaluation of Eigensolver Performance on Cray Systems, Adrian Tate and John G. Lewis, Cray Inc.; Jason Slemons, University of Washington XT3 File I/O Offloading, Paul Nowoczynski, Jason Sommerfield, Doug Balog, and J. Ray Scott (PITTSCC)
9:50
Status Report of the OpenFPGA Initiative: Efforts in FPGA Application Standardization, Eric Stahlberg, Kevin Wohlever, and Dave Strenski (OSC) Symmetric Pivoting in ScaLAPACK, Craig Lucas (MCC) A Center Wide File System Using Lustre, Shane Canon and H. Sarp Oral (ORNL)
10:15
Break
18 Technical Sessions
18A Operating Systems–UNICOS
(Room B1)
Chair: Brad Blasing (NCS-MINN)
18B Libraries–MPI
(Room B2)
Chair: Mike Pettipher (MCC)
18C Eldorado/MTA2
(Room B3)

Chair: Robert A. Ballance (SNLA)
10:40
Recent Trends in Operating Systems and their Applicability to HPC, Arthur Maccabe, Rolf Riesen, and Ron Brightwell (SNLA); Patrick Bridges, University of New Mexico Message Passing Toolkit (MPT) Software on XT3, Howard Pritchard, Doug Gilmore, and Mark Pagel, Cray Inc. Graph Software Development and Performance on the MTA-2 and Eldorado, Jonathan Berry and Bruce Hendrickson (SNLA)
11:20
Compute Node OS for XT3, Jim Harrell, Cray Inc. Open MPI on the XT3, Brian Barrett, Jeff Squyres, and Andrew Lumsdaine, Indiana University; Ron Brightwell (SNLA) Evaluation of Active Graph Applications on the Cray Eldorado Architecture, Jay Brockman, Matthias Scheutz, Shannon Kuntz, and Peter Kogge, University of Notre Dame; Gary Block and Mark James, NASA JPL; John Feo, Cray Inc.
11:45
XT3 Status and Plans, Charlie Carroll and David Wallace, Cray Inc. What if MPI Collectives Were Instantaneous? Rolf Riesen and Courtenay Vaughan (SNLA) Scalability of Graph Algorithms on Eldorado, Keith Underwood, Megan Vance, Jonathan Berry, and Bruce Hendrickson (SNLA)
12:10–1:30
Lunch
19 Technical Sessions
19A Sizing: Page, Cache, & Meshes
(Room B1)
Chair: Robert A. Ballance (SNLA)
19B XD1 Applications
(Room B2)
Chair: Kevin Wohlever (OSC)
19C Benchmarking/Comparison
(Room B3)
Chair: David Gigrich (BOEING)
1:30
The Effect of Page Size and TLB Entries on XT3 Application Performance, Neil Stringfellow (CSCS) Alef Formal Verification and Planning System, Samuel Luckenbill, James R. Ezick, Donald D. Nguyen, Peter Szilagyi, and Richard A. Lethin, Reservoir Labs, Inc. Performance Comparison of Cray X1 and Cray Opteron Cluster with Other Leading Platforms Using HPCC and IMB Benchmarks, Rolf Rabenseifner (HLRS); Subhash Saini and Robert Ciotti (NAS); Brian T. N. Gunney, Thomas E. Spelce, Alice Koniges, and Don Dossa, Lawrence Livermore National Laboratory; Panagiotis Adamidis and Sunil R. Tiyyagura (HLRS); Matthias Mueller, Dresden University of Technology; Rod Fatoohi, San Jose State University
2:00
Performance Characteristics of Cache-Insensitive Implementation Strategies for Hyperbolic Equations on Opteron Based Super Computers, David Hensinger and Chris Luchini (SNLA) XD1 Implementation of a SMART Coprocessor for Fuzzy Matching in Bioinformatics Applications, Eric Stahlberg and Ben Smith (OSC) Performance Analysis of Cray X1 and Cray Opteron Cluster, Subhash Saini (NAS); Rod Fatoohi, San Jose State University; Johnny Chang and Robert Ciotti (NAS)
2:30
Investigations on Scaling Performance and Mesh Convergence with Sandia's ASC FUEGO Code for Fire Model Predictions of Heat Flux, Mahesh Rajan and Amalia Black (SNLA) Simulating Alzheimer on the XD1, Jan H. Meinke and Ulrich H. E. Hansmann (KFA) An Accelerated Implementation of Portals on the Cray SeaStar, Ron Brightwell, Trammell Hudson, Kevin Pedretti, and Keith D. Underwood (SNLA)
3:00
Break
20 General Session (Room B1) Chair: CUG President
3:10
The AWE HPC Benchmark 2005, Ron Bell, S. Hudson, and N. Munday, Atomic Weapons Establishment
3:50
Next CUG (Seattle), Hank Heeb (BOEING)
4:00
LAC Appreciation and Adjournment, CUG President