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Final Program

Schedule

Click here to go to the list of abstracts.

Welcome from
the Program
Committee

Program Notes

 
Monday Tuesday Wednesday Thursday

Monday

1 Tutorials and SIG
  1B Tutorial 1C Tutorial and SIG
8:00 Application Performance Tuning on Cray XT Systems, Luiz DeRose, John Levesque, and Adrian Tate, Cray Inc. ALPS: Ascent, Michael Karo, Cray Inc.
10:00 Break
10:10 Application Performance Tuning on Cray XT Systems (continued) Legacy Systems SIG–Interactive Session, Chair: Jim Kasdorf (PITTSC)
10:55 Break (no refreshments)
2 Opening General Session
11:00 Welcome and Introduction, David Gigrich, CUG President, (BOEING) and Ville Savolainen, Local Arrangements Chair, CSC–Scientific Computing Ltd. (CSC)
11:15 Keynote Address: Computers Crunching Lipids–From Cell Membranes to Lipoproteins, Professor Ilpo Vattulainen, Leader of the Biological Physics & Soft Matter Group, Tampere University of Technology
12:00–1:15 Lunch
3 Technical Sessions
  3A Quad and More
3B Mass Storage 3C Libraries–MPI
1:15 Cray XT4 Quadcore: A First Look, Richard Barrett, Oak Ridge National Laboratory (ORNL)
The Need for Parallel I/O in Classical Molecular Dynamics, Ilian Todorov, HPCX Consortium (HPCX)
Overview of the Activities of the MPI Forum, Richard Graham, Oak Ridge National Laboratory (ORNL)
1:45 Reaching a Computational Summit: The 1 PFLOP Cray XT at the Oak Ridge National Laboratory, James
Rogers (ORNL)
Recent Improvements to Open MPI for the Cray XT, Ron Brightwell, Sandia National Laboratories (SNLA)
2:00 Reducing Human Intervention in the Maintenance of Mass Storage Systems, David Fellinger, Data Direct Networks, Inc
2:15 Performance Analysis and Optimization of the Trilinos Epetra Package on the Quad-Core AMD Opteron Processor, Brent Leback, The Portland Group Managing MPI Event Queue & Message Buffer Space, Geir Johansen, Cray Inc.
2:45 Break
4 Technical Sessions
  4A FFT Performance 4B Choice Topics 4C FPGA's
3:15 FFT Libraries on Cray XT: Current Performance and Future Plans for Adaptive FFT Libraries, Jonathan Bentz, Cray Inc.
Best Practices for Security Management in
Supercomputing
, Urpo Kaila, CSC–Scientific Computing Ltd. (CSC)
Speeding Genomic Searches Over 1000X Over a Single Opteron Using Multiple FPGAs on a Cray XD1, Olaf Storaasli, (ORNL)
3:45 Parallel 3D-FFTs for Multi-processing Core Nodes on a Meshed Communication Network, Joachim Hein, HPCX Consortium (HPCX)
CRAY XT in Second Life, Jason Tan, Western Australia Supercomputer Program (WASP)
The Harwest Compiling Environment: Accessing the FPGA World Through ANSI-C Programs, Paolo Palazzari, ENEA and Ylichron Srl
4:15 Optimizing FFT for HPCC, Courtenay Vaughan, Sandia National Laboratories (SNLA)
Debugging at Scale with Allinea DDT on the Cray XT4/5, David Lecomber, Allinea Software
Sorting Using the Virtex-4 Field Programmable Gate Arrays on the Cray XD1, Stephen Bique, Naval Research Laboratory (NRL)
4:45 Break
5 Interactive Session and BoFs
  5A Interactive Session 5B BoF 5C BoF
5:00-5:45
Applications and Programming Environments SIG, Chair: Robert Ballance (SNLA), Deputy Chair: Rolf Rabenseifner, (HLRS)
DVS-Just the FAQs, Dave Wallace and Jim Harrell, Cray Inc.
PRACE, Timothy Stitt, CSCS–Swiss National Supercomputing Centre (CSCS)

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